A semiconductor arrangement comprises a plurality circuitry arrangements, such as a plurality integrated circuits formed on a wafer. Generally, the plurality of circuitry arrangements comprises multiple instances of a particular integrated circuit pattern or design where the instances are replicated or repeated across die of the wafer, such that a first die has a first instance of the integrated circuit, a second die has a second instance of the integrated circuit, etc. The integrated circuits, or rather the die upon which the integrated circuits are formed, are spaced apart by scribe lines on the wafer. A separation process, such as a die cut process or a wafer sawing process, is performed along the scribe lines to detach the integrated circuits from one another.